TH50VSF2580AASB 数据手册 – Toshiba


零件编号 : TH50VSF2580AASB

Manufactures : Toshiba

描述

SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE.

The TH50VSF2580/2581AASB is a mixed multi-chip package containing a 4,194,304-bit full CMOS SRAM and a 33,554,432-bit flash memory. The CIOS and CIOF inputs can be used to select the optimal memory configuration.
The power supply for the TH50VSF2580/2581AASB can range from 2.7 V to 3.6 V. The TH50VSF2580/2581AASB can perform simultaneous read/write operations on its flash memory and is available in a 69-pin BGA package, making it suitable for a variety of applications.

•  Function mode control for flash memory
Compatible with JEDEC-standard commands
•  Flash memory functions
Simultaneous Read/Write operations
Auto-Program
Auto Chip Erase, Auto Block Erase
Auto Multiple-Block Erase
Program Suspend/Resume
Block-Erase Suspend/Resume
Data Polling / Toggle Bit function
Block Protection / Boot Block Protection
Support for automatic sleep and hidden ROM area
Common flash memory interface (CFI)
Byte/Word Modes
•  Erase and Program cycles for flash memory
10^5 cycles (typical)
•  Boot block architecture for flash memory
TH50VSF2580AASB: Top boot block
TH50VSF2581AASB: Bottom boot block
•  Package
P-FBGA69-1209-0.80A3: 0.31 g (typ.)

TH50VSF2580AASB datasheet

TH50VSF2580AASB Datasheet