零件编号 : MAX19711
功能 : 10-Bit, 11Msps, Full-Duplex Analog Front-End
制造商 : Maxim Integrated
引脚图 :
描述
General
描述
The MAX19711is an ultra-low-power, highly integrated mixed-signal analog front-end (AFE) ideal for CDMA communication applications operating in full-duplex (FD) mode. Optimized for high dynamic performance and ultra-low power, the device integrates a dual 10-bit, 11Msps receive (Rx) ADC; dual 10-bit, 11Msps transmit (Tx) DAC with CDMA baseband filters; three fast-settling 12-bit aux-DAC channels for ancillary RF front-end con
trol; and a 10-bit, 333ksps housekeeping aux-ADC. The typical operating power in FD mode is 37.5mW/42.7mW at a 4.915MHz/11MHz clock frequency. The Rx ADCs feature 54.8dB SNR and 74.2dBc SFDR at 1.875MHz input frequency with an 11MHz clock frequen
cy. The analog I/Q input amplifiers are fully differential and accept 1.024VP-Pfull-scale signals. Typical I/Q channel matching is ±0.01°phase and ±0.01dB gain.
特征
♦Dual 10-Bit, 11Msps Rx ADC and Dual 10-Bit,
11Msps Tx DAC
♦Ultra-Low Power
37.5mW/42.7mW at fCLK= 4.915MHz/11MHz,
FD Mode
24.3mW at fCLK= 11MHz, Slow Rx Mode
34.5mW at fCLK= 11MHz, Slow Tx Mode
Low-Current Standby and Shutdown Modes
♦Integrated CDMA Filters with > 64dBc Stopband
Rejection
♦Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
♦Excellent Dynamic Performance
SNR = 54.8dB at fIN = 1.875MHz (Rx ADC)
SFDR = 75dBc at fOUT= 620kHz (Tx DAC)
♦Three 12-Bit, 1µs Aux-DACs
♦10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging
♦Excellent Gain/Phase Match
±0.01° Phase, ±0.01dB Gain (Rx ADC) at
fIN = 1.87MHz
♦Multiplexed Parallel Digital I/O
♦Serial-Interface Control
♦Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
♦Miniature 56-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
数据手册 PDF资料下载
文件中的其他数据表：
MAX19711,MAX19711ETN,MAX19711ETN+